Processor Design in an Embedded Systems

The following are the units of the processor
– Instruction Register – Takes the Instruction codes to the Execution Unit
IQ – Instruction Queue – Queue of Instructions so that the IR does not have to wait for Next Instruction
ID – Instruction Decoder – It Decoded the opcode and sent it to CPU
CU – Control Unit – It control the Internal buses and other functionalities
ALU – Arithmetic and Logic Unit
SRS – System Register Set – Register set to store the system program
ARS – Application Register Set – Set of on chip register used during the processing of application program of the user
SP – Stack Pointer – Points to the address of the top of the stack
MAR – Memory Address Register – It holds the address of the data from an external memory
MDR – Memory Data Register – It holds the data from an external memory (either it will read from the memory or write to the memory)
PC – Program Counter – It contains the next instruction to be executed.
BIU – Bus Interface unit – It interfaces between the External and internal buses.

The following are the components that which are available only in high speed processors
I Cache – Instruction Cache – for high speed processing
D Cache – Data Cache (for high speed processing)
PFCU – Prefetch Control Unit
MMU – Memory Management Unit
AOU – Atomic Operation unit – prevents the shared data among the ISRs and Tasks
APU – Advanced Processing unit (pipelining and superscalar processing)

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