Tasks, Process and Threads

Process
Sequential Execution of Instructions

Tasks

1. Each task is independent since it is controlled by a scheduler or kernel of an Operating System
2. No task can call other tasks. since the Scheduler schedules the tasks
3. Each task is associated with an ID.
4. Each task has priority. for a 1 byte priority assignment, values 0 to 255 is used. higher the value higher the priority
5. Each task should coded in such a way that, they are waiting for a endless - event waiting loop.
6. Each task has a Task Control Block (TCB)
7. Each task will be having its own context and values at an instant. it is having its own Program counter(PC) and stack pointer (SP.
8. Each task will be in any one of the following 4 states

• idle - After the completion of one cycle of execution, a task will be in idle state until an event is fired
• ready - the task is ready to execute on the CPU, but the CPU is busy with executing higher priority tasks
• Running - currently the task is executing on the CPU - only one task can be in this state at any point of time
• Blocked or waiting - the task is waiting for an event to execute
  

Threads

1. Each task or process contains light weight process called threads. Each process or tasks more than one thread.
   
2. Tasks are kernel controlled entity where the threads are task controlled entity
3. Threads are sub process or sub tasks.
   
4. Different threads of same task can share the common structure available for the tasks
   

Software Maintenance

There are five types of software maintenance

1. Preventive Maintenance - A system may be checked and maintained periodically
2. Corrective Maintenance - Correct the deviation noticed under certain conditions of field use of the system
3. Perfection or Enhancement Maintenance - development team delivers a system on schedule and then finds another design capable of working more accurately and effectively
4. Adaptive Maintenance - Adapt the software to new conditions
5. System Reengineering - previously developed system is reengineered.
   

Software Project Management

People
People Senior Manager
1. Responsible for creating environment,
2. Organising, coordinating and managing all communications

Project Technical Manager or Team Leader
1. Selecting the language and tools
2. reorganize available software specification
3. Maintain activity graph for starting
4. motivates and encourage implementors

Implementors
1. Implements the software and hardware development process
2. uses modeling, source code engineering, testing

Customer or End User
1. Specifies the product and its quality requirements


Product
Embedded System product

Process
1. Product Development partitioned into smaller components and modules so that activities defined in the graph for activity are finished

Project
1. Design
2. Planning
3. Implementing and testing
4. Debugging and Maintaining

Serial Communication using UART

#include reg51.h>
void main()
{
TMOD = 0x20;
TH1=-3;
SCON = 0x50;
TR1 = 1;
while(1)
{
SBUF = 'ABCD';
while(TI=1)
{
TI=0;
}
}
}

Square Wave Generation using Delay

Delay Calculation
Crystal frequency = 11.059MHz.
1 machine cycle = 1 / (11.059/12) = 1.085μ s
For 1second delay1.085μ s * 921660 = 1 sec (approx)


#include <reg51.h>
main()
{
int i,j;
P0=0xff;
for(i=0;i<=1000;i++)
{
for(j=0;j<=490;j++);
}
P0=0x00;
for(i=0;i<=1000;i++)
{
for(j=0;j<=458;j++);
}
}

Sine Wave Generation

#include reg51.h>
at 0x2000 xdata char sinetable[13];
at 0x80 sfr sineout;
char dacout;
char i;
void timer_isr(void) interrupt 1
{
TF0=0;
dacout = sinetable[i++];
TH0= 0xff;
TL0=0xfb;
TR0=1;
if(i>13)
{
dacout = sinetable[0];
i=1;
}
}
void main()
{
sinetable [0] = 128; //0
sinetable [1] =192; //30
sinetable [2] =238; //60
sinetable [3] =255; //90
sinetable [4] =238;
sinetable [5] =192;
sinetable [6] =128;
sinetable [7] =64;
sinetable [8] =17;
sinetable [9] =0;
sinetable [10] =17;
sinetable [11] =64;
sinetable [12] =128;
i=0;
IE=0x82;
TMOD=0x01;
TCON = 0x01;
TH0 = 0xff;
TL0 = 0xFb;
TR0=1;
dacout = sinetable [i++];
for (;;);
}

Issues in Real Time Software Development

Issues in Requirement Analysis and Design

• Inter Process Communication
• Fault Tolerance and Reliability
• Event Latencies
• Maximum Latencies of ISRs
• Maximum response Time

Issues in Implementation

• Selection of OS (RTOS)
• Selection of Processors, Hardware, Memory and its Size
• Selection of Programming Language
• Power Management using wait and sleep mode
• Caches to be used or not

Issues in Testing

• Testing the Inter Process Communication (IPC)
• Testing Parallelism and Concurrency
• Testing Memory and Stack Overflow
• Testing Software Portability in Hardware
• Testing Software Hardware Integration
• Testing the program flow in critical regions for shared data
• Testing the throughput from the tasks and ISRs

Software Testing, Verifiying and Validating

Verification - to ensure that all the specific functions are correctly implemented

Validation - to ensure that the software that has been created is as per the requirments agreed upon at the analysis phase and to ensure its quality

Testing

White Box Testing (also called as Glass Box)

1. Testing the program flow
2. Testing the conditions
3. testing all the loop indices (start to last)
4. all logical paths
5. testing the function control structures and looping structure

Black Box Testing (Behavioral testing)

1. testing in done with set of input conditions and events
2. performance testing

Specific Environment Testing

1. Testing GUI and User Interface
2. Client Server Testing
3. Test the display and keypad
4. Testing the help utilities and Documents

Comparison Testing

1. Several available versions are running in parallel and the functions and behavior compared

Debugging

1. Laboratory tools like Simulator, IDE, etc
2. Program Break Points
3. Macros
4. Output files for Inputs
5. Scopes (CRO, Storage Oscilloscopes, Logic Analyzer,etc)

Software Implementation

1. Use of language in which the software team has expertise and experience
2. Use an Operating System or RTOS that is more appropriate. (Small scale does not need RTOS, so code size will be reduced much)
3. Simpliciyt to be maintained. Each function should perform a single task and have simple design
4. Comments must be added before control statements
5. Program implementation should be as per design specification.
6. Make function implementation general, not tied to specific input conditions or events. This makes reuse earlier.
7. Redesigning might be needed to solve software implementation difficulties

Software Development Life Cycle (SDLC)

Phases in Software Development

1. Definition and Analysis of System Requirements
   
   1. Clarity of the Specifications
      
   2. Specifications are obtained for
      
      1. Required processing of data
         
      2. Necessary functions & tasks and their expected performance
         
      3. Expected system behavior
         
      4. Design constraints
         
      5. Life cycle of the product
         
2. Development
   
   1. Software design, coding and testing are the main activities in the development process.
      
3. Support
   
   1. Software should need little support for software reengineering by changing environment
      

Models for process Life Cycle

1. Linear Sequential Life cycle model
   
   1. Model/ Analyze
      
   2. Design of data structures, software architecture, Interfaces and Algorithms
      
   3. Testing the internal logic and external functions
      
2. Rapid Development Model (RAD)
   
   1. Each software component of Linear Model developed by a team
      
   2. Stage 1 – Business modeling
      
   3. Stage 2 – Characteristics and attributes of sets of Data Structures and objects, data modeling, software architecture
      
   4. Stage 3 – Description of adding, deleting, modifying and retrieving data objects
      
   5. Stage 4 – Code creation
      
   6. Stage 5 – Testing stage
      
3. Increment development model
   
   1. Delivering the software incrementally
      
   2. Stage 1 – Same as Linear Model Analyzing, designing, coding and testing
      
   3. Stage 2 – When 1^st effort is at design, the 2^nd effort starts analyzing
      
   4. Stage 3 – When 1^st effort is at coding, the 2^nd effort starts designing, the 3^rd effort starts analyzing.
      
   5. Stage 4 - When 1^st effort is at testing, the 2^nd effort starts coding, the 3^rd effort at designing and the 4^th effort starts analyzing.
      
4. Concurrent model
   
   1. Under development
      
   2. Awaiting change
      
   3. Under revision
      
   4. Done
      
5. Component based model
   
   1. Identification of software components
      
   2. Selection of classes from software components library
      
   3. Sort available components
      
   4. Reengineer components and create unavailable components
      
   5. Construct software from the components and test them
      
   6. Iteratively construct till final validation
      
6. Fourth Generation tool base development (4GL) model
   
   1. Automatic report generation for high level graphics, data base queries
      
   2. Automated HTML code generation when creating a website
      
7. Object oriented development model
   
   1. Currently software development process combine object orientation and fourth generation tools
      

Software Analysis

• Requirement Analysis
  
• Any problem can be modeled as
  
  • Information domain
    
  • Functional domain
    
  • Behavioral domain
    
• Prototype development and prototype specification often helps
  
• Many times, it may not be possible to completely specify a problem
  

Software Design

• Architectural design
  
• Data design
  
• Interface design
  
• Component design
  

  

Use of Graphs in Multiprocessor Systems

Each task or function executed in an assigned processor

PA, PB – are two processors A and B

V1’,V2’,V3’ – three threads of task 1

V1² ,V2² ,V3² – Three threads of task 2 

Each task or function is executed on different processors at different periods

Instructions of four different tasks partitioned on two processors

Instructions of four different tasks partitioned and scheduled on two processors differently at different periods

PA, PB – are two processors A and B

V1’,V2’,V3’ – three threads of task 1

V1² ,V2² ,V3² – Three threads of task 2 

C11,C12 - Instructions for Task 1

C21, C22 - Instructions for Task 2

C31, C32 - Instructions for Task 3